When driving a data signal line (also referred to as a “source line”), liquid crystal display devices use a method in which a D/A converter is used to convert a digital video signal into an analog video signal, and an amplifier circuit (also referred to as an “amplifier”, an “output circuit”, or an “analog buffer”) provided at the subsequent stage of the D/A converter is used to amplify the analog video signal, which amplified signal is used to drive the data signal line. The reason for using this method is that the data signal line has a large capacitive component, and therefore voltage on the data signal line cannot be changed at a sufficient rate by simply driving the data signal line based on an output signal from the D/A converter.
Stability and low-power-consumption capability are required of the amplifier circuit for driving the data signal line. In addition, to perform highly accurate amplification with a negative feedback-type amplifier circuit, a high amplification factor is required. Accordingly, when a single amplifier is not able to achieve a desired amplification factor, a method with a plurality of cascaded amplifiers is used. However, in the case of amplifier circuits including a plurality of amplifiers, a phase delay occurs in the amplifier at each stage, and therefore it is necessary to perform phase compensation in order to prevent oscillation during application of negative feedback.
Regarding the phase compensation in the amplifier circuit including a plurality of amplifiers, the following techniques are conventionally known. Patent Document 1 describes an amplifier circuit configured by cascading three inverters, in which a resistive element and a capacitive element are provided in the second-stage inverter. Also, Patent Document 2 describes an amplifier circuit including an input amplification stage and an output amplification stage, in which a resistive circuit is interposed between an output terminal of the output amplification stage and a signal output terminal.    [Patent Document 1] Japanese Laid-Open Patent Publication No. 2003-255916    [Patent Document 2] Japanese Laid-Open Patent Publication No. 11-150427